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1 of 13 050307 ds75lx digital thermometer and thermostat with extended addressing www.maxim-ic.com general description this low-voltage (1.7v to 3.7v) digital thermometer and thermostat provides 9, 10, 11, or 12-bit digital temperature readings over a -55c to +125c range with 2c accuracy over a -25 c to +100c range. at power-up, the ds75lx defaults to 9-bit resolution for software compatibility with the lm75. communication with the ds75lx is achieved through a simple 2-wire serial interface. three tri-state address pins allow up to 27 ds75lx devices to operate on the same 2-wire bus, which greatly simplifie s distributed temperature- sensing applications. the ds75lx thermostat has a dedicated open-drain output (o.s.) and programmable fault tolerance, which allow the user to define the number of consecutive error conditions that must occur before o.s. is activated. ther e are two thermostatic operating modes that cont rol thermostat operation based on user-defined trip-points (t os and t hyst ). applications any thermally sensitive system cellular base stations telecom switches and routers servers pin configurations features ? 1.7v to 3.7v operating range ? tri-state address pins allow up to 27 unique bus addresses ? temperature measurements require no external components ? measures temperatures from -55c to +125c (-67f to +257f) ? 2c accuracy from -25c to +100c ? thermometer resolution is user- configurable from 9 (default) to 12 bits (0.5c to 0.0625c resolution) ? 9-bit conversion time is 25ms (max) ? thermostatic settings are user-definable ? data is read/written through 2-wire serial interface (sda and scl pins) ? data lines filtered internally for noise immunity (50ns deglitch) ? bus timeout feature prevents lockup problems on 2-wire interface ? multidrop capability simplifies distributed temperature-sensing applications ? pin/software compatible with the lm75 ? available in 8-pin sop ( max ? ) and so packages ordering information part temp range pin package ds75lxs+ -55c to +125c 8 so (150 mils) ds75lxs+t&r -55c to +125c 8 so (150 mils), 2500 piece ds75lxu+ -55c to +125c 8 sop (max) ds75lxu+t&r -55c to +125c 8 sop (max), 3000 piece + denotes lead-free package. t&r denotes tape-and-reel. note: a ?+? symbol will also be marked on the package near the pin 1 indicator. max is a registered trademark of maxim integrated products, inc. so (150 mil s) sc l v dd a 0 a 1 a 2 gnd o.s. s d a 6 8 7 5 3 1 2 4 ds75 lx sop/ max sc l v dd a 0 a 1 a 2 gnd o.s. s d a 6 8 7 5 3 1 2 4 ds75 lx
ds1386/ds1386p 2 of 13 absolute maximum ratings voltage range on v dd , relative to ground -0.3v to +4.0v voltage range on any other pin, relative to ground -0.3v to +6.0v operating temperature range -55c to +125c storage temperature range -55c to +125c soldering temperature see ipc/jedec j-std-020 these are stress ratings only and functional operation of the devic e at these or any other conditions above those indicated in the operation sections of this specification is not implied. exposure to absolute maximum rating co nditions for extended periods of time may affect reliability. the dallas semiconductor ds75lx is built to the high est quality standards and manufactured for long-term reliability. all dallas semiconductor devices are made using the same quality materials and manufacturing methods. however, the ds75lx is not exposed to environmental stresses, such as burn-in, that some industrial applications require. for specific reliability information on this product, contact the factory in dallas at (972) 371- 4448. dc electrical characteristics (1.7v v dd 3.7v, t a = -55c to +125c.) parameter symbol conditions min max units supply voltage v dd (note 1) 1.7 3.7 v -25c to +100c 2.0 thermometer error (note 2) t err -55c to +125c 3.0 c input logic-high sda, scl v ih (note 3) 0.7 x v dd v dd + 0.3 v input logic-low sda, scl v il v ss - 0.3 0.3 x v dd v v ol1 3ma sink current 0 0.4 sda output logic-low voltage (note 3) v ol2 6ma sink current 0 0.6 v o.s. saturation voltage v ol 4ma sink current (notes 2, 3) 0.8 v input current sda, scl 0.4 < v i/o < 0.9v dd -10 +10 a i/o capacitance c i/o 10 pf address input sink current i lah a0, a1, or a2 tied to v dd (notes 4, 5) 0.2 3.5 a address input source current i lal a0, a1, or a2 tied to gnd (notes 4, 5) 0.2 3.5 a address voltage high v ah (note 6) v dd - .04 v address voltage low v al (note 6) v ss + .04 v standby current i dd1 (notes 4, 5) 13 a active temp conversions 1000 active current (notes 1, 4, 5) i dd communication only 100 a ac electrical characteristics (1.7v v dd 3.7v, t a = -55c to +125c.) parameter symbol conditions min typ max units resolution 9 12 bits 9-bit conversions 25 10-bit conversions 50 11-bit conversions 100 temperature conversion time t convt 12-bit conversions 200 ms
ds75lx: digital thermometer and thermostat with extended addressing 3 of 13 scl frequency f scl 400 khz ac electrical characte ristics (continued) (1.7v v dd 3.7v, t a = -55c to +125c.) parameter symbol conditions min typ max units bus free time between a stop and start condition t buf (note 7) 1.3 s start and repeated start hold time from falling scl t hd:sta (notes 7, 8) 600 ns low period of scl t low (note 7) 1.3 s high period of scl t high (note 7) 0.6 s repeated start condition setup time to rising scl t su:sta (note 7) 600 ns data-out hold time from falling scl t hd:dat (notes 7, 9) 0 0.9 s data-in setup time to rising scl t su:dat (note 7) 100 ns rise time of sda and scl (receive) t r (notes 7, 10) 20 + 0.1c b b 300 ns fall time of sda and scl (receive) t f (notes 7, 10) 20 + 0.1c b b 300 ns spike suppression filter time (deglitch filter) t ss 0 50 ns stop setup time to rising scl t su:sto (note 7) 600 ns capacitive load for each bus line c b b 400 pf input capacitance c i 5 pf serial interface reset time t timeout sda time low (notes 11, 12) 75 325 ms note 1: v dd must be decoupled with a high-quality 0.1f bypass capacit or. x5r or x7r ceramic surface-mount capacitors are recommended. note 2: internal heating caused by o.s. loading c auses the ds75lx to read approximately 0.5 c higher if o.s. is sinking the max rated current. note 3: all voltages are referenced to ground. note 4: i dd specified with o.s. pi n open and a0?a2 pins grounded. note 5: i dd and address leakage specified with v dd at 3.0v and sda, scl = 3.0v at 0 c to +70 c. note 6: address pins a0, a1, a2 are directly connected to v dd , v ss , or floating with less than 50pf capacitive load. note 7: see the timing diagram (figure 1). a ll timing is referenced to 0.9 x v dd and 0.1 x v dd . note 8: after this period, the first clock pulse is generated. note 9: the ds75lx provides an internal hold time of at least 75ns on the sda signal to bridge the undefined region of scl's falling edge. note 10: for example, if c b = 300pf, then t r [min] = t f [min] = 50ns. note 11: this timeout applies only when the ds75lx is holding sda low. other devices can hold sda low indefinitely and the ds75lx will not reset. note 12: the ds75lx is available with timeout featur e disabled upon special order. contact factory. pin description pin name function 1 sda data input/output for 2-wire serial communication port (open drain) 2 scl clock input for 2-wire serial communication port 3 o.s. thermostat output open drain 4 gnd ground 5 a 2 address input 6 a 1 address input 7 a 0 address input 8 v dd supply voltage. +1.7v to +3.7v supply pin. v dd must have an external bypass capacitor to gnd. 0.1f x5r or x7r ceramic smt caps recommended.
ds75lx: digital thermometer and thermostat with extended addressing block diagram 4 of 13 t os and t hyst re g i s ter s configuration re g i s ter temperature re g i s ter oversampling m o d u lat o r precision referen c e digital de c imat o r address and i/o control a 1 a 2 a 0 scl figure 1. timing diagram sd a v dd gnd thermostat co mparat o r r p o.s.
ds75lx: digital thermometer and thermostat with extended addressing operation?measur ing temperature the ds75lx measures temperature using a bandgap temper ature-sensing architecture. an on-board delta-sigma analog-to-digital converter (adc) converts the measured temperature to a digital value that is calibrated in degrees celsius; for fahrenheit applications a lookup table or conversion routine must be used. the ds75lx is factory- calibrated and requires no external co mponents to measure temperature. at power-up the ds75lx immediately begins measuring and converting its own temperature to a digital value. the resolution of the digital output data is user-configurable to 9, 10, 11, or 12 bits, corresponding to temperature increments of 0.5 c, 0.25 c, 0.125 c, and 0.0625 c, respectively, with 9-bit default resolution at power-up. the resolution is controlled via the r0 and r1 bits in the configuration register as explained in the configuration register section of this data sheet. note that the conversion time doubles for each additional bit of resolution. after each temperature measurement and analog-to-digital conversion, the ds75lx stores the temperature as a 16-bit two?s complement number in the 2-byte temperature register (see figure 2). the sign bit (s) indicates if the temperature is positive or negative: for positive numbers s = 0 and for negative numbers s = 1. the most recently converted digital measurement can be read from the te mperature register at any time. since temperature conversions are performed in the background, reading t he temperature register does not affect the operation in progress. bits 3 through 0 of the temperature register are hard wired to 0. when the ds75lx is configured for 12-bit resolution, the 12 msbs (bits 15 through 4) of the te mperature register contain temperature data. for 11-bit resolution, the 11 msbs (bits 15 through 5) of the temper ature register contain data, and bit 4 reads out as 0. likewise, for 10-bit resolution, the 10 msbs (bits 15 th rough 6) contain data, and for 9-bit the 9 msbs (bits 15 through 7) contain data, and all unused lsbs will contain 0s. table 1 gives examples of 12-bit resolution digital output data and the corresponding temperatures. figure 2. temperature, t h , and t l register format bit 15 bit 14 bit 13 bit 12 bit 11 bit 10 bit 9 bit 8 ms byte s 2 6 2 5 2 4 2 3 2 2 2 1 2 0 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 ls byte 2 -1 2 -2 2 -3 2 -4 0 0 0 0 table 1. 12-bit resolution te mperature/data relationship temperature ( c) digital output (binary) digital output (hex) +125 0111 1101 0000 0000 7d00h +25.0625 0001 1001 0001 0000 1910h +10.125 0000 1010 0010 0000 0a20h +0.5 0000 0000 1000 0000 0080h 0 0000 0000 0000 0000 0000h -0.5 1111 1111 1000 0000 ff80h -10.125 1111 0101 1110 0000 f5e0h -25.0625 1110 0110 1111 0000 e6f0h -55 1100 1001 0000 0000 c900h 5 of 13
ds75lx: digital thermometer and thermostat with extended addressing 6 of 13 shutdown mode for power-sensitive applications, the ds75lx offers a low-power shutdown mo de. the sd bit in the configuration register controls shutdown mode. when sd is changed to 1, the conversion in progress is completed and the result is stored in the temperature register after which the ds75lx goes into a low-power standby state. the o.s. output is cleared if the thermostat is oper ating in interrupt mode, and o.s remain s unchanged in comparator mode. the 2- wire interface remains operational in shutdown mode, and wr iting a 0 to the sd bit returns the ds75lx to normal operation. operation?thermostat the ds75lx thermostat has two operating modes, co mparator mode and interrupt mode, which activate and deactivate the open-drain thermo stat output (o.s.) based on us er-programmable trip-points (t os and t hyst ). the ds75lx powers up with the thermost at in comparator mode with active-low o.s. polarity and with the overtemperature trip-point (t os ) register set to +80c and the hysteresis trip-point (t hyst ) register set to +75c. if these power-up settings are compatible with the applicati on, the ds75lx can be used as a stand-alone thermostat (i.e., no 2-wire communication required). if interrupt mode operation, active-high o.s. polarity, or different t os and t hyst values are desired, they must be programmed after power-up, so stand-alone op eration is not possible. in both operating modes, the user can program the thermost at fault tolerance, which sets how many consecutive temperature readings (1, 2, 4, or 6) must fall outside of the thermostat limits befor e the thermostat output is triggered. the fault tolerance is set by the f1 and f0 bi ts in the configuration regist er and at power-up the fault tolerance is 1. the data format of the t os and t hyst registers is identical to that of the te mperature register (see figure 2), i.e., a 2-byte two?s complement representation of the trip-point temperature in de grees celcius with bits 3 through 0 hardwired to 0. after every temperature conversion, the measured temperature is compared to the values in the t os and t hyst registers, and then o.s. is up dated based on the result of the co mparison and the operating mode. the number of t os and t hyst bits used during the thermostat comparison is equal to the conversion resolution set by the r1 and r0 bits in the configurat ion register. for example, if the resolu tion is 9 bits, only the 9 msbs of t os and t hyst will be used by the thermostat comparator. the active state of the o.s. output can be changed by the pol bit in the configuration regi ster. the power-up default is active low. if the user does not wish to use the thermostat capab ilities of the ds75lx, the o.s. output should be left floating. note that if the thermo stat is not used, the t os and t hyst registers can be used for gene ral storage of system data. comparator mode when the thermostat is in comparat or mode, o.s. can be programmed to ope rate with any amount of hysteresis. the o.s. output becomes active when the measured temperature exceeds the t os value a consecutive number of times as defined by the f1 and f0 fault tolerance (ft) bits in the configuration register. o.s. then stays active until the first time the temperature falls below the value stored in t hyst . putting the device into shutdown mode does not clear o.s. in comparator mode. thermo stat comparator mode operation with ft = 2 is illustrated in figure 3. interrupt mode in interrupt mode, the o.s. output first becomes active when the measured temperature exceeds the t os value a consecutive number of times equal to the ft value in the co nfiguration register. once activated, o.s. can only be cleared by either putting the ds75lx into shutdown mode or by reading from any register (temperature, configuration, t os , or t hyst ) on the device. once o.s. has been deactivated, it will only be reactivated when the measured temperature falls below the t hyst value a consecutive number of time s equal to the ft value. again, o.s can only be cleared by putting the device into shutdown m ode or reading any register. thus, this interrupt/clear process is cyclical between t os and t hyst events (i.e, t os , clear, t hyst , clear, t os , clear, t hyst , clear, etc.). thermostat interrupt mode operation with ft = 2 is illustrated in figure 3.
ds75lx: digital thermometer and thermostat with extended addressing figure 3. o.s. output operation example configuration register the configuration register allows the user to progra m various ds75lx options such as conversion resolution, thermostat fault tolerance, thermostat polarity, thermostat operating mode, and shutdown mode. the configuration register is arranged as shown in figure 4 and detailed descri ptions of each bit are provided in table 2. the user has read/write access to all bits in t he configuration register except the ms b, which is a reserved read-only bit. the entire register is volatile, and thus powers up in its default state. figure 4. configuration register msb bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 lsb 0 r1 r0 f1 f0 pol tm sd in this example the ds75lx is configured to have a fault tolerance of 2. o.s. output - comparator mode conversions inactive active temperature t os t hyst inactive active o.s. output - interrupt mode assumes an interrupt clear event has occurred 7 of 13
ds75lx: digital thermometer and thermostat with extended addressing 8 of 13 table 2. configuration re gister bit descriptions bit name description 0 reserved power-up state = 0 the master can write to this bit, but it always reads out as a 0. r1 conversion resolution bit 1 power-up state = 0 sets conversion resolution (see table 3). r0 conversion resolution bit 0 power-up state = 0 sets conversion resolution (see table 3). f1 thermostat fault tolerance bit 1 power-up state = 0 sets the thermostat fault tolerance (see table 4). f0 thermostat fault tolerance bit 0 power-up state = 0 sets the thermostat fault tolerance (see table 4). pol thermostat output (o.s.) polarity power-up state = 0 pol = 0 ? o.s. is active low. pol = 1 ? o.s. is active high. tm thermostat operating mode power-up state = 0 tm = 0 ? comparator mode. tm = 1 ? interrupt mode. see the operation?thermostat section for a detailed description of these modes. sd shutdown power-up state = 0 sd = 0 ? active conversion and thermostat operation. sd = 1 ? shutdown mode. see the shutdown mode section for a detailed description of this mode. table 3. resolution configuration r1 r0 thermometer resolution (bits) max conversion time (ms) 0 0 9 25 0 1 10 50 1 0 11 100 1 1 12 200 table 4. fault tolerance configuration f1 f0 consecutive out-of-limits conversions to trigger o.s. 0 0 1 0 1 2 1 0 4 1 1 6 register pointer the four ds75lx registers each have a unique two-bit point er designation, which is defined in table 5. when reading from or writing to the ds75lx, the user must ?point ? the ds75lx to the register that is to be accessed. when reading from the ds75lx, once the pointer is set it re mains pointed at the same register until it is changed. for example, if the user w ants to perform consecutive reads from the te mperature register, the pointer only has to be set to the temperature register one time, after which all reads will automatically be from the temperature register until the pointer value is changed. on the other hand, when writing to the ds75lx, the pointer value must be refreshed each time a write is performed, even if the sa me register is being written to twice in a row. at power-up, the default pointer value is the temperat ure register so the temperature register can be read immediately without resetting the pointer. changes to the pointer setting are accomplished as described in the 2-wire serial data bus.
ds75lx: digital thermometer and thermostat with extended addressing 9 of 13 table 5. pointer definition register p1 p0 temperature 0 0 configuration 0 1 t hyst 1 0 t os 1 1 2-wire serial data bus the ds75lx communicates over a standard bidirectional, 2-wire serial data bus that consists of a serial clock (scl) signal and serial data (sda) signal. the ds75lx inte rfaces to the bus through the scl input pin and open- drain sda i/o pin. all communication is msb first. the following terminology is used to describe 2-wire communication: master device: microprocessor/microcontroller that controls th e slave devices on the bus. the master device generates the scl signal and start and stop conditions. slave: all devices on the bus other than the master . the ds75lx always functions as a slave. bus idle or not busy: both sda and scl remain high. sda is held high by a pullup resistor when the bus is idle, and scl must either be forced high by the master (if the scl output is push-pull) or pulled high by a pullup resistor (if the scl output is open drain). transmitter: a device (master or slave) that is sending data on the bus. receiver: a device (master or slave) that is receiving data from the bus. start condition: signal generated by the master to indicate the beginning of a data transfer on the bus. the master generates a start condition by pulling sda fr om high to low while scl is high (see figure 5). a ?repeated? start is sometimes used at the end of a data tran sfer (instead of a stop) to indicate that the master will perform another operation. stop condition: signal generated by the master to indicate th e end of a data transfer on the bus. the master generates a stop condition by transitioning sda from low to high while scl is high (see figure 5). after the stop is issued, the master releases the bus to its idle state. acknowledge (ack): when a device (either master or slave) is acting as a receiver, it must generate an acknowledge (ack) on the sda line after receiving every by te of data. the receiving device performs an ack by pulling the sda line low for an entire scl period (see figur e 5). during the ack clock cycle, the transmitting device must release sda. a variation on the ack signal is the ?not acknowledge? (nack). when the master device is acting as a receiver, it uses a nack instead of an ack a fter the last data byte to indicate that it is finished receiving data. the master indicates a nack by le aving the sda line high during the ack clock cycle. slave address: every slave device on the bus has a unique 7-bit address that allows the master to access that device. the ds75lx?s 7-bit bus address depends on the state of the external address pins a0?a2. see table 6. the three address pins allow up to 27 ds75lxs to be mu ltidropped on the same bus. when tying an address line high or low, connect the address line directly to v dd or gnd. do not use series resistors on these pins. address byte: the address byte is transmitted by the master and consists of the 7-bit slave address plus a read/write (r/w ) bit (see figure 6). if the master is going to read data from the slave device then r/w = 1, and if the master is going to write data to the slave device then r/w = 0. pointer byte: the pointer byte is used by the master to tell th e ds75lx which register is going to be accessed during communication. the six msbs of the pointer byte (see figure 7) are always 0 and the two lsbs correspond to the desired register as shown in table 6.
ds75lx: digital thermometer and thermostat with extended addressing figure 5. start, stop, and ack signals 10 of 13 figure 6. address byte bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 a 6 a 5 a 4 a 3 a 2 a 1 a 0 r/w the address pins a0?a2 are tri-state input s. these can be low, high, or floating in any combination, resulting in 27 address possibilities. these map into t he address byte according to table 6. figure 7. pointer byte bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0 0 0 0 0 0 p1 p0 scl sda start condition stop condition ? ? ack (or nack) from receiver general 2-wire information ? all data is transmitted msb first over the 2-wire bus. ? one bit of data is transmitted on the 2-wire bus each scl period. ? a pullup resistor is required on t he sda line and, when the bus is idle, both sda and scl must remain in a logic-high state. ? all bus communication must be initiated with a start co ndition and terminated with a stop condition. during a start or stop is the only time sda is allowed to ch ange states while scl is high. at all other times, changes on the sda line can only occur when scl is lo w: sda must remain stable when scl is high. ? after every 8-bit (1-byte) transfer, the receiving device must answer wi th an ack (or nack), which takes one scl period. therefore, nine clocks are r equired for every 1-byte data transfer.
ds75lx: digital thermometer and thermostat with extended addressing 11 of 13 table 6. address configuration a2 a1 a0 address 0 0 0 1001000 0 0 1 1001001 0 1 0 1001010 0 1 1 1001011 0 0 float 0101100 0 float 0 0101000 0 1 float 0101101 0 float 1 0101001 0 float float 0110101 1 0 0 1001100 1 0 1 1001101 1 1 0 1001110 1 1 1 1001111 1 0 float 0101110 1 float 0 0101010 1 1 float 0101111 1 float 1 0101011 1 float float 0110110 float 0 0 1110000 float 0 1 1110010 float 1 0 1110011 float 1 1 1110101 float 0 float 1110001 float float 0 1110110 float 1 float 1110100 float float 1 1110111 float float float 0110111
ds75lx: digital thermometer and thermostat with extended addressing 12 of 13 writing to the ds75lx to write to the ds75lx, the master must generate a st art followed by an address byte containing the ds75lx bus address. the value of the r/w bit must be a 0, which indicates that a write is about to take place. the ds75lx responds with an ack after receiving the address byte. th is must be followed by a pointer byte from the master, which tells the ds75lx which register is being written to. the ds75lx again responds with an ack after receiving the pointer byte. following this ack the master devic e must immediately begin transmitting data to the ds75lx. when writing to the configuration regist er, the master must send one byte of data (see figure 8a), and when writing to the t os or t hyst registers the master must send two bytes of dat a (see figure 8b). after receiving each data byte, the ds75lx responds with an ack, and the transac tion is finished with a stop from the master. software por the soft por command is hex 54. issue a write command to the ds75lx. it responds with an ack. if the next byte is a 0x54, the ds75lx will reset as if power had been cycled. no ack is sent by the ic after the por command is received. reading from the ds75lx when reading from the ds75lx, if the pointer was already pointed to the desired register during a previous transaction, the read can be performed i mmediately without changing the pointer setting. in this case the master sends a start followed by an address byte containing the ds75lx bus address. the r/w bit must be a 1, which tells the ds75lx that a read is being performed. after the ds75lx sends an ack in response to the address byte, the ds75lx begins transmitting the requested data on the ne xt clock cycle. when readi ng from the configuration register, the ds75lx transmits one byte of data, after which the master must respond with a nack followed by a stop (see figure 8c). for 2-byte reads (i.e., from the temperature, t os , or t hyst register), the ds75lx transmits two bytes of data, and the master must respond to the firs t data byte with an ack and to the second byte with a nack followed by a stop (see figure 8d). if only the most significant byte of data is needed, the master can issue a nack followed by a stop after reading the first data byte , in which case the transacti on will be the same as for a read from the configuration register. if the pointer is not already pointing to the desired register , the pointer must first be updated as shown in figure 8e, which shows a pointer update followed by a single-byte read. the value of the r/w bit in the initial address byte is a 0 (?write?) since the master is going to write a pointer byte to the ds75lx. after the ds75lx responds to the address byte with an ack, the master sends a pointer byte that corresponds to the desired register. the master must then perform a repeated start followed by a standard 1- or 2-byte read sequence (with r/w = 1) as described in the previous paragraph. package information (the package drawing(s) in this data sheet may not reflect the most current specificat ions. for the latest package outline information, go to www.maxim-ic.com/dallaspackinfo .) package document no. 8-pin so 56-g2008-001 8-pin sop/max 21-0036
ds75lx: digital thermometer and thermostat with extended addressing figure 8. 2-wire interface timing (ds75lx) (ds75lx) a d2 d6 d5 d4 d3 d1 d0 wa 0 00 0 0 00 1ad7 address byte start scl sda ack pointer byte p data byte (from master) stop ack ack (ds75lx) a d2 d6 d5 d4 d3 d1 d0 wa 0 00 0 0 00 1 0 00 0 0 00 1ad7 b) write to the co nfiguration register s address byte start scl sda ack pointer byte p data byte (from master) stop ack ack c) write to the t os or t hyst register scl sda w a address byte start ack (ds75lx) a 0 0 000 0 p1 p0 pointer byte ack (ds75lx) d4 d6 d5 d3 d2 d0 d7 d6 d5 d4 d3 d2 d1 d0 d7 a d1 p ls data byte (from master) a ms data byte (from master) stop ack (ds75lx) ack (ds75lx) c) write to the t os or t hyst register scl sda s w a address byte start ack a 0 0 000 0 p1 p0 0 0 000 0 p1 p0 pointer byte ack d4 d6 d5 d3 d2 d0 d7 d6 d5 d4 d3 d2 d1 d0 d7 a d1 p ls data byte (from master) a ms data byte (from master) stop ack ack d) read single byte (new pointer location) (ds75lx) start (from ds75lx) (master) (ds75lx ) (ds75lx) n a 0 w 0 00 0 0 d6 d5 d4 d3 d2 d1 d0 p d7 ra ack repeat scl sda address byte start pointer byte data byte stop nack address byte ack ack p1 p0 n a 0 s w 0 00 a 0 0 d6 d5 d4 d3 d2 d1 d0 p d7 s ra ack repeat scl sda address byte start pointer byte data byte stop nack address byte ack ack p1 p0 p1 p0 on) scl sda start n d6 d5 d4 d3 d2 d1 d0 p d7 r data byte (from ds75lx) stop nack (master) address byte ack (ds75lx) s e) read from the configuration register (current pointer location) scl sda start n d6 d5 d4 d3 d2 d1 d0 p d7 r data byte stop nack (master) address byte ack n d6 d5 d4 d3 d2 d1 d0 p d7 ra data byte stop nack (master) address byte ack a) read 2-bytes from the temperature, t os or t hyst register (current pointer location) scl sda start a d6 d5 d4 d3 d2 d1 d0 d7 1 1 0ra ms data byte (from ds75lx) ack (master) address byte ack (ds75lx) n d6 d5 d4 d3 d2 d1 d0 p d7 ls data byte (from ds75lx) stop nack (master) s bytes from the temperature, t os or t hyst register (current pointer location) scl sda start a d6 d5 d4 d3 d2 d1 d0 d7 1 1 0 0 ra ms data byte ack (master) address byte ack n d6 d5 d4 d3 d2 d1 d0 p d7 ls data byte stop nack (master) 1 1 0 1 1 0 0 1 1 0 1 1 0 0 1 1 0 1 1 0 0 1 1 0 1 1 0 0 1 1 0 1 1 0 0 an address byte value of 1110010 corresponds to a0 connected to v dd , a1 connected to gnd, and a2 floating. 13 of 13

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